Description
Cisco Catalyst 9600X Supervisor Engine 2
The new Catalyst 9600X SUP-2 supervisor is based on Cisco Silicon One Q200 Application-Specific Integrated
Circuit (ASIC), which is purpose built for the next generation core with a programmable pipeline (P4) and is the
first network silicon to offer switching capacity up to 12.8 Tbps full duplex per ASIC in the enterprise. The Q200
ASIC offers high- performance full routing and switching capabilities without external memories. The Catalyst
9600 Series leverages a high-performance multiple core x86 CPU and is Cisco’s leading purpose-built modular
core and edge services enterprise switching platform, built for security, IoT, and cloud.
Catalyst 9600X SUP-2 overview
- The Cisco Silicon One Q200 Application-Specific Integrated Circuit (ASIC)1 is purpose built for the next generation network core and edge switch. It is the first enterprise ASIC to offer speeds up to 12.8 Tbps full duplex with 8 Bpps of forwarding performance, while supporting high-performance and full routing and switching capabilities without external memories.
- The Cisco Silicon One Q200 ASIC is built on 7nm fabrication technology, capable of high performance while maintaining a low power footprint.
- The Cisco Silicon One Q200 ASIC includes an 8GB on-chip 2.5D High Bandwidth Memory (HBM), for deep packet buffers and route table expansion.
- 80MB of dedicated low-latency buffer, with up to 8GB of HBM buffer
- Intel 2.7-GHz x86 CPU with 8 cores and 32GB of DDR4 memory
- Up to 960 GB of SATA SSD local storage for container-based application hosting (2x 10G SFP+ management ports)
- ASIC tables for switching scale up to 256K MAC addresses and routing scale up to 2M routes.
- IPv6 support in hardware provides wire-rate forwarding for IPv6 networks.
- Dynamic hardware forwarding table allocations enable easy IPv4-to-IPv6 migration.
- Flexible routing (IPv4, IPv6, and multicast) tables, Layer 2 tables, ACL tables, and QoS tables
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